Circuit boards are used for mounting and interconnecting electronic components in most electronic equipment. Such circuit boards are made after design thereof, wherein an image of the desired board or circuit networks are made by a plating or etching process, or a combination of such processes providing various conductive paths.
Various boards may be laminated together and the networks on each board connected to one of the other laminated boards.
Such boards may be very expensive depending on the size thereof, the number of networks, and the number of boards which may be laminated together. More important is the overall integrity of the board when it is utilized in a much more expensive piece of equipment. Such boards are subject to one or more defects including discontinuities in a network, resulting in an open circuit and a resistive fault, or where two or more networks are shorted together.
There have been many different tests utilized on pre-prepared circuit boards, which may be referred to as "raw boards," before electrical components are mounted thereon.
One such testing device which is known in the art is the so-called "bed of nails" in which probes contact each network and, under the control of a computer program, make resistance measurements between each terminal pair of a network of the board to verify the existence of a proper conductive path to ensure that there are no short circuits or unacceptable low resistance paths between networks. This "bed of nails" testing technique is effective where there are a large number of boards to be tested, justifying the customization and positioning of the probes.
Also, techniques have been suggested utilizing moveable probes for measuring the continuity between circuit board networks, and possible shorting between between networks or portions thereof.
It has also been suggested that moving probes be used to test each network to determine whether the conductor patterns or networks meet specifications, as described in an article entitled "Computerized Testing of Thin-Film Circuit Conductors" by Alan R. Gerhardt et al. of Western Electric Corporation (in Solid State Technology, September, 1971.)
Another method of testing the integrity of networks on a circuit board is described in U.S. Pat. 3,975,680 in which the capacitance of each circuit board network with respect to a common ground plane is made. A further procedure for such capacitance testing is described in an article by Robert W. Wedwick, in Testing MLBs Continuity by Capacitance, November, 1974, pp. 60-61.
U.S. Pat. No. 4,565,966 describes a method and apparatus for testing circuit boards, utilizing a combination of capacitance and resistance testing, which embodies an obvious combination of prior art techniques of capacitance testing and resistance testing.
The present invention is directed to a method and apparatus for testing circuit boards, wherein probes contacting terminal points on the board will first charge the network and then measure the discharge time between a network on a board and a conductive reference plane. If the discharge time is without certain time restraints, then resistance checks are made to determine continuity.
The initial checks on each network are not really a measure of capacitance of the network with respect to a reference conductor, but a measure of the time in which a charged network will discharge with respect to a conductive reference plane after being charged to a predetermined voltage.
An object of this invention is to provide a new and improved method and apparatus for testing bare circuit boards.
Another object of this invention is to provide a new and improved method and apparatus for testing the integrity of networks on a circuit board where each network is charged to a predetermined voltage with respect to a conductive reference plane and the discharge time is measured to determine the integrity of the network.
A further object of the invention is to provide a new and improved moving probe arrangement for measuring the discharge time of charged networks and also for measuring the resistance of a network or portions of a network, which do not conform to the discharge testing.